hv9931 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com features constant output current large step-down ratio unity power factor low input current harmonic distortion fixed frequency or ?xed off-time operation internal 450v linear regulator input and output current sensing input current limit enable, pwm and phase dimming applications of?ine led lamps and ?xtures street lamps traf?c signals decorative lighting ? ? ? ? ? ? ? ? ? ? ? ? ? general description the hv9931 is a ?xed frequency pwm controlle r ic designed to control an led lamp driver using a single-stage pfc buckboost-buck topology. it can achieve a unity power factor and a very high step-down ratio that enables driving a single high-brightness led from the 85-264vac input without a need for a power transformer. this topology allows reducing the ?lter capacitors and using non-electrolytic capacitors to improve reliability. the hv9931 uses open-loop peak current control to regulate both the input and the output current. this control technique eliminates a need for loop compensation, limits the input inrush current, and is inherently protected from input under-voltage condition. capacitive isolation protects the led lamp from failure of the switching mosfet. hv9931 provides a low-frequency pwm dimming input that can accept an external control signal with a duty ratio of 0-100% and a frequency of up to a few kilohertz. the pwm dimming capability enables hv9931 phase control solutions that can work with standard wall dimmers. typical application circuit vi n ga te cs 1 c s2 vd d pw md rt gn d r ref2 r ref1 r cs 1 r cs 2 c2 v in l1 l2 c1 q1 d3 r s1 r s2 d4 vo + - d1 d2 ~a c ~ ac c in r t hv993 1 hv9931 unity power factor led lamp driver
2 hv9931 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com ordering information device 8-lead soic (narrow body) 4.90x3.90mm body 1.75mm height (max) 1.27mm pitch hv9931 hv9931lg-g -g indicates package is rohs compliant (green) absolute maximum ratings parameter value v in to gnd -0.5v to +470v v dd to gnd -0.3v to +13.5v cs1, cs2, pwmd, gate, rt to gnd -0.3v to (v dd +0.3v) operating temperature range -40c to +85c storage temperature range -65c to +150c continuous power dissipation (t a = +25c) 630mw sym parameter min typ max units conditions input v indc input dc supply voltage range* 8.0 - 450 v dc input voltage i insd shut-down mode supply current* - 0.5 1.0 ma pwmd connected to gnd internal regulator v dd internally regulated voltage 7.12 7.50 7.88 v v in = 8.0, i dd(ext) = 0, gate = 500pf, r t = 226k? v dd, line line regulation of v dd 0 - 1.0 v v in = 8.0 - 450v, i dd(ext) = 0, gate = 500pf, r t = 226k ? , uvlo v dd undervoltage lockout threshold 6.45 6.70 6.95 v v dd rising ? uvlo v dd undervoltage lockout hysteresis - 500 - mv --- pwm dimming v pwmd(lo) pwmd input low voltage - - 1.0 v v in = 8.0 - 450v v pwmd(hi) pwmd input high voltage 2.4 - - v v in = 8.0 - 450v r pwmd pwmd pull-down resistance 50 100 150 k? v pwmd = 5.0v stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the speci?cations is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 1 2 3 4 8 7 6 5 vin cs1 gn d ga te rt cs2 vdd pwm d pin con?guration product marking 8-lead soic (lg) y = year sealed ww = week sealed l = lot number = green packaging yww h9931 l l l l 8-lead soic (lg) (top view) electrical characteristics (the * denotes the speci?cations which apply over the full operating junction temperature range of -40c < t a < +85c, otherwise the speci?cations are at t a = 25c, v in = 12v, unless otherwise noted) thermal resistance package ja 8-lead soic 128 o c/w
3 hv9931 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com sym parameter min typ max units conditions gate v gate(hi) gate high output voltage* v dd -0.3 - v dd v i gate = 10ma, v dd = 7.5v, v in open v gate(lo) gate low output voltage* 0 - 0.3 v i gate = -10ma, v dd = 7.5v, v in open t rise gate output rise time - 30 50 ns c gate = 500pf, v dd = 7.5v, v in open t fall gate output fall time - 30 50 ns c gate = 500pf, v dd = 7.5v, v in open t delay delay from cs trip to gate - 150 300 ns v cs1 , v cs2 = -100mv t blank blanking delay 150 215 280 ns v cs1 , v cs2 = -100mv oscillator f osc oscillator frequency 80 100 120 khz r t = 226k? comparators v offset1 v offset2 comparator input offset voltage* -15 - 15 mv --- functional block diagram 7. 5v vin cs1 cs 2 pw md ga te vd d rt r q s agnd hv9931 regulator osc leading edge blanking electrical characteristics (cont.) (the * denotes the speci?cations which apply over the full operating junction temperature range of -40c < t a < +85c, otherwise the speci?cations are at t a = 25c, v in = 12v, unless otherwise noted)
4 hv9931 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com functional description power topology the hv9931 is optimized to drive supertex s proprietary single-stage, single-switch, non-isolated topology, cascading an input power factor correction (pfc) buck-boost stage and an output buck converter power stage. this power converter topology offers numerous advantages useful for driving high-brightness light emitting diodes (hb led). these advantages include unity power factor, low harmonic distortion of the input ac line current, and low output current ripple. the output load is decoupled from the input voltage with a capacitor making the driver inherently failure-safe for the output load. the power converter topology also permits reducing the size of a ?lter capacitor needed, enabling use of non-electrolytic capacitors. the latter advantage greatly improves reliability of the overall solution. the hv9931 is a peak current-mode controller that is speci?cally designed to drive a constant current buck- boost-buck power converter. this patent pending control scheme features two identical current sense comparators for detecting negative current signal levels. one of the comparators regulates the output led current, while the other is used for sensing the input inductor current. the second comparator is mainly responsible for the converter start-up. the control scheme inherently features low inrush current and input under-voltage protection. the hv9931 can operate with programmable constant frequency or constant off-time. in many cases, the constant off-time operating mode is preferred, since it improves line regulation of the output current, reduces voltage stress of the power components and simpli?es regulatory emi compliance. (see application note an-h52.) input voltage regulator the hv9931 can be powered d irectly from its vin pin, and takes a voltage from 8v to 450v. when a voltage is applied at the vin pin, the hv9931 seeks to maintain a constant 7.5v at the vdd pin. the v dd voltage can be also used as a reference for the current sense comparators. the regulator is equipped with an under-voltage protection circuit which shuts off the hv9931 when the voltage at the vdd pin falls below 6.2v. the vdd pin must be bypassed by a low esr capacitor ( 0.1f) to provide a low impedance path for the high frequency current of the output gate driver. the hv9931 can also be operated by supplying a voltage at the vdd pin greater than the internally regulated voltage. this will turn off the internal linear regulator and the hv9931 will function by drawing power from the external voltage source connected to the vdd pin. pwm dimming and wall dimmer compatibility pwm dimming can be ac hieved by applying a ttl- compatible square wave signal at the pwmd pin. when the pwmd pin is pulled high, the gate driver is enabled and the circuit operates normally. when the pwmd pin is left open or connected to gnd, the gate driver is disabled and the external mosfet turns off. the hv9931 is designed so that the signal at the pwmd pin inhibits the driver only, and the ic need not go through the entire start-up cycle each time ensuring a quick response time for the output current. the power topology requires little ?lter capacitance at the output, since the output current of the buck stage is continuous, and since ac line ?ltering is accomplished through the middle capacitor rather than the output one. therefore, disabling the hv9931 via its pwmd or vin pins can interrupt the output led current in accordance with the phase-controlled voltage waveform of a standard wall dimmer. oscillator connecting an external resistor from rt pin to gnd programs switching frequency: connecting the resistor from the rt pin to the gate programs constant off-time: [ ] [ ] s t 25000 f khz r k 22 ? = + [ ] [ ] t off r k 22 t s 25 ? + =
5 hv9931 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com input and output current feedback two current sense comparators are includ ed in the hv9931. both comparators have their non-inverting inputs internally connected to ground (gnd). the cs1 and cs2 inputs are inverting inputs of the comparators. connecting a resistor divider into either of these inputs from a positive reference voltage and a negative current sense signal programs the current sense threshold of the comparator. the v dd voltage of the hv9931 can be used as the reference voltage. if more accuracy is needed, an external reference voltage can be applied. when either the cs1 or the cs2 pin voltage falls below gnd, the gate pulse is terminated. a leading edge blanking delay of 215ns (typ) is added. the gate voltage becomes high again upon receiving the next clock pulse of the oscillator circuit. referring to the functional circuit diagram, the cs2 comparator is responsible for regulating output current. the output led current can be programmed using the following equation: where ?i l2 is the peak-to-peak current ripple in l2. the cs1 comparator limits the current in the input inductor l1. there is no charge in the capacitor c1 upon the start-up of the converter. therefore, l2 cannot develop the output current, and the hv9931 starts-up in the input current limiting mode. the cs1 current threshold must be programmed such that no input current limiting occurs in normal steady-state operation. the cs1 threshold can be programmed in accordance with a similar equation: where i l1(pk) is the maximum peak current in l1. mosfet gate driver typically, th e gate driving capability of the hv9931 is limited by the amount of power dissipation in its linear regulator. thus, care must be taken selecting a switching mosfet to be used in the circuit. an optimal trade-off must be found between the gate charge and the on-resistance of the mosfet to minimize the input regulator current. ( ) . l1 pk cs 1 ref 1 s 1 i r r r 7 5v = ? ? . l2 cs 2 ref 2 s 2 1 io i 2 r r r 7 5v ? + = ? ? i l2 i l1 v dd 0 0 0 t t t gate switching waveform
6 hv9931 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com functional circuit diagram v in l1 l2 c1 q1 d3 r s1 r s2 r ref2 r re f1 r cs 1 r cs 2 d4 vo + - 7. 5v v s1 + _ v s2 + _ v c1 + _ i l2 i l1 q r s d1 d2 ~a c ~ ac c in os c re g c dd gn d pw md cs 2 vi n cs 1 rt ga te vdd r t hv9931 pin # pin name description 1 vin this pin is the input of a high voltage regulator. 2 cs1 this pin is used to sense the input and output currents of the converter. it is the inverting input of the internal comparator. 3 gnd ground return for all the internal circuitry. this pin must be electrically connected to the ground of the power train. 4 gate this pin is the output gate driver for an external n-channel power mosfet. 5 pwmd when this pin is pulled to gnd, switching of the hv9931 is disabled. when the pwmd pin is released, or external ttl high level is applied to it, switching will resume. this feature is provided for applications that require pwm dimming of the led lamp. 6 vdd this is a power supply pin for all internal circuits. it must be bypassed with a low esr capacitor to gnd. 7 cs2 this pin is used to sense the input and output currents of the converter. it is the inverting input of the internal comparator. 8 rt oscillator control. a resistor connected between this pin and gnd sets the pwm frequency. a resistor connected between this pin and gate sets the pwm off-time. pin description
supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate product liability indemnification insurance agreement. supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc. website: http//www .supertex.com . ?2008 all rights reserved. unauthorized use or reproduction is prohibited . 1235 bordeaux drive, sunnyvale, ca 9408 9 te l: 408-222-8888 www .supertex.com 7 hv9931 (the package drawing(s) in this data sheet may not re?ect the most current speci?cations. for the latest package outline information go to http://www.supertex.com/packaging.htm l .) doc.# dsfp-hv9931 a102108 8-lead soic (narrow body) package outline (lg) 4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch 1 8 seating plane gauge plane l l1 l2 e e1 d e b a a2 a1 seating plane a a to p v iew side v iew vi ew b vi ew b 1 note 1 (index area d/2 x e1/2) vi ew a-a h h note 1 symbol a a1 a2 b d e e1 e h l l1 l2 1 dimension (mm) min 1.35* 0.10 1.25 0.31 4.80* 5.80* 3.80* 1.27 bsc 0.25 0.40 1.04 ref 0.25 bsc 0 o 5 o nom - - - - 4.90 6.00 3.90 - - - - max 1.75 0.25 1.65* 0.51 5.00* 6.20* 4.00* 0.50 1.27 8 o 15 o jedec registration ms-012, variation aa, issue e, sept. 2005. * this dimension is not speci?ed in the original jedec drawing. the value listed is for reference only. drawings are not to scale. supertex doc. #: dspd-8solgtg, version h101708. note: this chamfer feature is optional. a pin 1 identi?er must be located in the index area indicated. the pin 1 identi?er can be: a molded mark/identi?er; an embedded metal marker; or a printed indicator. 1.
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